1. Field of the Invention
The present invention relates to a lead frame used for a semiconductor apparatus, especially for a QFN (Quad Flat Non-Leaded) semiconductor apparatus which is manufactured using a MAP (Molded Array Process) mold-forming technique in which a plurality of semiconductor apparatuses are collectively sealed with resin.
2. Description of the Related Art
A QFN semiconductor apparatus is manufactured by using the MAP mold-forming technique which seals a plurality of semiconductor apparatuses with resin collectively. First, a lead frame in which a plurality of lead parts of adjacent unit lead frames are interconnected via a connecting bar is prepared as a MAP lead frame. A semiconductor device is bonded on a mounting part of the lead frame, and the semiconductor device and leads of the lead frame are connected via wires. Then, the lead frame, the semiconductor device and the wires are sealed with resin. Subsequently, the connecting bar (also referred to as a dam bar) is removed by dicing, thereby splitting into individual unit lead frames.
If the thickness of the connecting bar is large, a load to a rotary blade is increased when performing the dicing, thereby accelerating galling of the rotary blade. Thus, a dicing capability is deteriorated and cutting burr may be produced.
JP-A-2005-166695 describes a technique for performing half-etching from a rear side on the whole of the dam bar except for a rear side of a device mounting part and a rear-side terminal part of the lead. In this way, it is possible to suppress the acceleration of galling of the rotary blade when performing the dicing, and prevent the cutting burr from being produced.